gitlab.telecom-paris.fr
mbe-tools/utilities
This project provides utility libraries that can be used by several MBE tools such as RAMSES, TTool or RDALTE
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mbe-tools/RAMSES
RAMSES (Refinement of AADL Models for Synthesis of Embedded Systems) is a model transformation and code generation tool that produces C code for ARINC653-compliant operating systems and OSEK-compliant operating systems.
Last synced at: almost 2 years ago - Pushed at: about 2 years ago - Stars: 3
griesner/geopfModeles
Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
renaud.pacalet/sab4z
A simple example design for Zynq-based boards. VHDL design of custom HW mapped in Programmable Logic, Linux - Busybox - Buildroot SW stack, user SW applications interacting with custom hardware, Linux drivers, SW and HW debugging.
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mbe-tools/ramses-2
RAMSES-2 (Refinement of AADL Models for Synthesis of Embedded Systems) is a model refinement and code generation tool that produces C code for ARINC653, OSEK and POSIX-compliant operating systems. More at https://mem4csd.telecom-paristech.fr/blog/
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mbe-tools/ADOSATE
Model synchronization between Adele and OSATE with MoTE TGG.
Last synced at: almost 2 years ago - Stars: 0 - Forks: 0
sen/dev-projects/cfglut5-sbox
16 nibbles (64 bits) parallel sboxes using Xilinx CFGLUT5 primitive
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sen/docs_template
Modèle pour la génération de supports de cours (poly+slides) au format html, pdf et même docx à partir d'une source unique (au format markdown/pandooc).
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dsi/pydesfire
API pour communication avec carte Mifare DESFire EV1
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mbe-tools/vafl
Experiment Specification (ExSpec) is a language to specify the provenance of experiment/simulation data. ExSpec models are the basis of the Validity Frame Language (VaFL, pronounced "waffle") to specify the validity frames of models.
Last synced at: almost 2 years ago - Stars: 1 - Forks: 0
ring/multi-temporal-merlin
Multi-temporal speckle reduction with self-supervised deep neural networks
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mbe-tools/aadl-mt-bench
A Benchmark of Incremental Model Transformation Tools based on an Industrial Case Study with AADL
Last synced at: almost 2 years ago - Stars: 0 - Forks: 0
ring/guided-river-detection
Python implementation of the narrow rivers extraction framework proposed by N.Gasnier, L.Denis, F.Liège, R.Fjørtoft, and F.Tupin in Narrow River Extraction from SAR ImagesUsing Exogenous Information (https://doi.org/10.1109/JSTARS.2021.3083413).
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ring/geometric_mean_denoising
Matlab implementation associated with the article "On the use and denoising of the temporal geometric mean for SAR time series", submitted to IEEE Geoscience and Remote sensing Letters by N.Gasnier, L.Denis and F.Tupin.
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ring/glrt_based_lines_detector
Python implementation of the GLRT based linear features detector proposed by N.Gasnier, L.Denis, and F.Tupin in Generalized Likelihood Ratio Tests for Linear Structure Detection in SAR Images (EUSAR 2021).
Last synced at: almost 2 years ago - Stars: 0 - Forks: 0
ring/SAR-CNN
SAR Image Despeckling by Deep Neural Networks: from a pre-trained model to an end-to-end training strategy - Notebook implementation usable on Google Colaboratory
Last synced at: almost 2 years ago - Stars: 0 - Forks: 0
mbe-tools/AADL-to-SystemC
Generation of SystemC code from AADL models for functional simulation
Last synced at: almost 2 years ago - Stars: 0 - Forks: 0
latex/beamer-tpt-ng
Nouveau thème Beamer aux couleur de Télécom Paris
Last synced at: almost 2 years ago - Stars: 3 - Forks: 1
sen/dev-projects/sv_sim_uart
SystemVerilog simulation environment for an UART
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mbe-tools/mpm4cps-private
This project contains the ontological framework developed during the MPM4CPS COST Action IC1404 () by working group 1 on foundations for MPM4CPS (http://mpm4cps.eu/).
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dsi/presentation-services-dsi
Présentation de l'offre de service de la DSI
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sen/dev-projects/rtl-ator
Example of Verilog/SystemVerilog + SystemC TB simulation using Verilator
Last synced at: almost 2 years ago - Stars: 1 - Forks: 0
mbe-tools/TTool
TTool (pronounced "tea-tool") is a toolkit dedicated to the edition of UML and SysML diagrams, and to the simulation and formal verification (safety, security, performance) of those diagrams. See ttool.telecom-paris.fr and @TTool_UML_SysML
Last synced at: almost 2 years ago - Pushed at: about 2 years ago - Stars: 7 - Forks: 0
griesner/geopf
Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
griesner/poissonReco
Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0